Cadence SPB OrCAD 16.60.029 Hotfix
 

Cadence SPB OrCAD 16.60.029 Hotfix



Cadence Design Systems Ltd., a world-renowned provider of EDA software, has released an hotfix 029 for Cadence SPB OrCAD 16.60, software a comprehensive package design of electronic circuits, analog and digital simulation, IC design of programmable logic and custom circuits, as well as the development and preparation for the production of printed circuit boards.


Cadence Design Systems, Inc., a leader in global electronic design innovation, launched the Cadence OrCAD 16.6 design solution with new features, enhanced customization capabilities, and 20 percent simulation performance improvements that provide customers a shorter, more predictable path to product creation.

This latest release offers numerous improvements to tool usability and performance, but at the heart of 16.6 are three key benefits: enhanced miniaturization capabilities, timing-aware physical implementation and verification for faster timing closure, and the industrys first electrical CAD team collaboration environment for PCB design using Microsoft SharePoint technology.

DATE: 05-23-2014 HOTFIX VERSION: 029
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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1209461 FSP DE-HDL_SCHEMATIC Hierarchical Block Size not automatically adjusting to text needs
1217832 SIG_EXPLORER SIMULATION S-param generated by SigXP doesn``t match with HSPICE/ADS.
1263575 CONCEPT_HDL CORE Copy-Pate makes Components Off-Grid
1267602 SPIF OTHER Route Automatic hangs
1268022 FSP PROCESS FSP is not respecting the use banks for attached design.
1268587 ALLEGRO_EDITOR INTERFACES Enh. Preserve relation between hole and padstack in IPC-2581
1268918 SIP_LAYOUT DIE_ABSTRACT_IF SiP - DIE export from co-design object to XDA results in missing data
1269232 CONCEPT_HDL INFRA While pspice uprev the design crashes
1269825 SIG_INTEGRITY SIGNOISE PCB SI hangs when running crosstalk simulations
1270963 ALLEGRO_EDITOR GRAPHICS Add Circle lint font hidden/Phantom has resolution problem
1270990 ALLEGRO_EDITOR GRAPHICS Allegro response is slow when added circle
1271655 ALLEGRO_EDITOR MANUFACT Dimension option causes a generic crash, reproducible in any design
1272495 ALLEGRO_EDITOR MANUFACT Filtered Part numbers in IPC-2581 still pass actual part number for references onutide of BOMItem
1272839 ALLEGRO_EDITOR MANUFACT Kindly explain the drill legend behavior when padstack rotation is 45 degrees and mirrored ?
1274518 ALLEGRO_EDITOR ARTWORK Artwork does not create void correctly.

About Cadence Design Systems, Inc.

Cadence enables global electronic design innovation and plays an essential role in the creation of today``s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry.


Name: Cadence SPB OrCAD
Version: (32bit) 16.60.029 Hotfix
Home: www.cadence.com
Interface: english
OS: Wind0ws XP / Vista / Seven
System Requirements: Cadence SPB OrCAD 16.60.000 - 16.60.028


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